1. Field of the Invention
The present invention relates to a method and related devices for synchronizing a wobble clock with a writing clock of a compact disk (CD) drive, and more particularly, to a method and related devices for synchronizing the wobble clock with the writing clock by adjusting the frequency of the writing clock.
2. Description of the Prior Art
In this modern information based society, one of the major concerns is how to manage and store tremendous amounts of information. Compared to other kinds of storage media, a compact disk has a small size and a higher-density storage capacity. Due to developments in recordable and rewritable compact disk technology, consumers have the ability to utilize compact disk storage capacity on their personal computers.
Similar to general compact disks, the recordable compact disk (CDR) also has a plurality of pits and lands arranged along a data track for recording digital data. Furthermore, the recordable compact disk comprises a wobble track positioned adjacent the data track for recording wobble signals, which are used for separating the recordable compact disk into a plurality of areas on the surface of the CD. Each of the areas is defined as a big frame or a mini-frame, and is separated into ninety-eight small subframes, in which each of the small subframes comprises 588 channel bits for recording digital data. Because there is no data stored in the data track of a blank recordable CD, the CD drive cannot distinguish the big frames from each other according to the data track before data are written on the data track. In order to orientate the big frames, the wobble track of the recordable CD records wobble signals. Please refer to FIG. 1 which is a top view of a recordable compact disk 10.
As shown in FIG. 1, the compact disk 10 comprises a reflecting surface 13. On the reflecting surface 13 of the compact disk 10, there is a fine spiral track 11. Please refer to FIG. 1, which shows a magnified view 1A of the fine track 11. The track 11 is composed of two types of tracks, one being a data track 12 to record data, and the other being a wobble track 14 positioned adjacent to the data track 12. As illustrated in the magnified view 1A, the data track 12 has a continuously spiral shape, while the wobble track 14 has an oscillating shape. Additionally, the curvature of the wobble track 14 is composed of small segment curves. In a further magnified view 1B in FIG. 1, an interrupt and discontinuity record mark 16 is shown within data track 12. The length of each record mark 16 varies, and the reflection index of the record mark 16 is different from that of the reflecting surface 13. The record mark 16 is used to allow the compact disk drive to be able to write data on the compact disk 10. The surface of the wobble track 14 protrudes beyond the reflecting surface 13, and the reflection index of the wobble track 14 is also different from that of the reflecting surface 13. The data track 12 is located inside a groove formed by the raised wobble track 14 surface as shown in FIG. 2, which is a three-dimensional perspective view of the magnified view 1B of the compact disk 10. As the compact disk 10 rotates, the compact disk drive detects the variation of the reflection light from the small segment curves of the wobble track 14 so as to generate a wobble signal. The wobble signal is a frequency-modulated signal and represents different digital data through varied frequencies. The compact disk drive generates a harmony signal, which is used for orientating the big frames of the data track 12, by decoding the wobble signal.
In other words, when the compact disk drive writes data on to the recordable compact disk 10, the CD drive analyzes the distribution of the big frames of the data track 12 by decoding the wobble signal read from the wobble track 14. Because the CD drive writes data on to the data track 12 while the compact disk rotates, the operations of writing must be synchronized with the rotation of the compact disk. The CD drive, thus, can write the digital data on the correct locations of the data track 12. Please refer to FIG. 3. FIG. 3 is a timing diagram of waveforms of related signals of a CD drive. When digital data is written on the recordable compact disk 10, the CD drive controls the length of each channel bit according to a writing clock Cw. The length of each period of the writing clock Cw determines the length of corresponding record marks 16. As previously mentioned, each big frame of the data track 12 is composed of a plurality of channel bits. Therefore, a frame clock Cf, which corresponds to the big frames, can be generated according to the writing clock Cw. One period of the frame clock Cf is defined as the time duration Tfw in which the CD drive writes data on to a corresponding big frame. The waveforms of the writing clock Cw and the frame clock Cf are shown in FIG. 3. Additionally, the CD drive also can decode the wobble clock Cb1 and the harmony signal S1 while the CD is rotating over an optical module of the CD drive. Generally, the harmony signal S1, which corresponds to the rotation speed of the CD, should be synchronized with the frame clock Cf that is used to control the operations of the optical module while the CD is being written, as shown in FIG. 3. In other words, if the optical module operates correctly, the harmony signal S1, which has periods Tf for locating the positions of big frames of the CD, must have the same period and frequency as the frame clock Cf, which has periods Tfw, and synchronizes with the writing clock Cw. Moreover, the phase difference between the harmony signal S1 and the frame clock Cf is equal to zero or is less than a predetermined error range. Therefore, the CD drive is capable of writing data on correct positions according to the harmony signal S1, which is associated with the wobble track 14.
However, if the rotation speed of the CD is too fast, the wobble track 14 and the data track 12 rotate over the optical module faster, and this makes the periods of the harmony signal shorten. As shown in FIG. 3, another set of wobble signal Cb2 and harmony signal S2 correspond to such a condition. Because the frame clock Cf does not synchronize with the harmony signal S2, the CD drive may write data on wrong big frames of the CD. Similarly, another set of wobble signal Cb3 and harmony signal S3, shown in FIG. 3, correspond to a condition in which the rotation speed of the CD is too slow. The CD drive also writes data on wrong big frames of the CD according to the frame clock Cf, which does not synchronize with the harmony signal S3.
Each of CD drives must have a control circuit for synchronizing the frame clock with the harmony signal. Please refer to FIG. 4, which is a function block diagram of a CD drive 20 having a control circuit 22 according to the prior art. The CD drive 20 is used to write data on the CD 10, and comprises the control circuit 22, a motor 34, and an optical module 32. The motor 34 rotates the CD 10. The optical module 32 generates corresponding time-variable signals by detecting the data track 12 and the wobble track 14 while the CD 10 is rotating, and generates a corresponding harmony signal S0 according to the corresponding time-variable signals. Moreover, the optical module 32 can also write data on the data track 12 according to a writing clock Cw0. The control circuit 22 has a synchronization circuit FC, a frequency divider 24, a phase detector PD0, a frequency detector FD0, a sub-control circuit 28, a switch circuit 30, and an activating circuit 26. The synchronization circuit FC can generate the writing clock Cw0 according to a system clock Cs0 that has fixed time periods, and further comprises a frequency divider and a phase-locking circuit that are used to synchronize the writing clock Cw0 with the system clock Cs0, where the ratio between the periods of the writing clock Cw0 with the system clock Cs0 is equal to a constant. Because the system clock Cs0 has a plurality of periods with the same interval, the periods of the writing clock Cw0 also correspond to the same time duration. The writing clock Cw0 is divided by a predetermined ratio D0 via the frequency divider 24 so as to generate a frame clock Cf0. That means that the period of the frame clock Cf0 is D0 times of the period of the writing clock Cw0. As previously mentioned, there are a plurality of channel bits in a big frame, and one of the periods of the frame clock Cf0 corresponds to an equivalent number of the periods of the writing clock Cw0, so that the ratio D0 can be determined. The phase detector PD0 and the frequency detector FD0 respectively detect the phase difference and the frequency difference between the frame clock Cf0 and the harmony signal S0, and the outputs of the phase detector PD0 and the frequency detector FD0 transmit to activating circuit 26 and the sub-control circuit 28. The sub-control circuit 28 has a low-pass frequency filter to filter the signal received from the phase detector PD0 and the frequency detector FD0. The switch circuit 30 is turned on/off by an input signal Mode so as to determine whether to transmit the output signal of the sub-control circuit 28 to the activating circuit 26. The activating circuit 26 can transmit a corresponding activating signal M0 to the motor 34 according to the inputs received from the phase detector PD0, the frequency detector FD0, and the sub-control circuit 28 so as to control the rotation speed of the CD 10.
The control circuit 22 is used to synchronize the harmony signal S0 with the frame clock Cf0 so as to make the optical module 32 write data on the correct position of the CD 10. According to the prior art, the frame clock Cf0 is generated according to the system clock Cs0, which has periods with the same interval, so the time duration of each period of the frame clock Cf0 is fixed and the frame clock Cf0 can be taken as a standard clock signal. Additionally, the harmony signal S0 generated by the optical module 32 can respond to the rotation speed of the CD 10. The frame clock Cf0 and the harmony signal S0 are transmitted to the phase detector PD0 and the frequency detector FD0 to compare their phases and frequencies respectively, and the results of the phase detector PD0 and the frequency detector FD0 transmit to the activating circuit 26 so that the activating circuit 26 can control the rotation speed of the motor 34 according to the received results. For example, if the motor 34 rotates too fast, the frequency of the harmony signal S0 increases, and then the phase detector PD0 and the frequency detector FD0 compare the harmony signal S0 with the frame clock Cf0 and generate corresponding signal and transmit it to the activating circuit 26 to reduce the rotation speed of the motor 34. In other words, the method according to the prior art adjusts the phase and the frequency of the harmony signal S0 so as to synchronize the harmony signal S0 with the frame clock Cf0, which has fixed frequency.
To write data on the correct position on the CD 10, the control circuit 22 should eventually make the phase difference and the frequency difference between the frame clock Cf0 and the harmony signal S0 equal to zero. However, the motor 34 cannot be driven, if there is not any signal with a nonzero voltage (or current) transmitted to the motor 34. When there is not any phase difference or frequency difference between the frame clock Cf0 and the harmony signal S0, the phase detector PD0 and the frequency detector FD0 do not transmit any signal to the activating circuit 26. To avoid shutting down the motor 34 when the CD drive 20 writes data on the CD 10 and the phase difference and the frequency difference between the frame clock Cf0 and the harmony signal S0 are equal to zero, a sub-control circuit 28 is needed to transmit signals to the activating circuit 26 in a timely manner. Therefore, the method according to the prior art comprises the two following steps: (1) adjusting the rotation speed of the motor 34 to make the frequency difference between the frame clock Cf0 and the harmony signal S0 be equal to zero, and to make the phase difference between the frame clock Cf0 and the harmony signal S0 be unequal to zero, where the phase difference can trigger the activating circuit 26 to transmit the activating signal M0 to the motor 34 to force the motor 34 rotate (i.e. the CD drive 20 is in a constant linear velocity mode and the switch circuit 30 disconnects the output of the sub control circuit 28 from the activating circuit 26 at this time); and (2) after there is a stable phase difference between the frame clock Cf0 and the harmony signal S0, switching the CD drive 20 into a write mode, and then the control circuit 22 further makes the phase difference between the frame clock Cf0 and the harmony signal S0 equal to zero, and meanwhile a mode control signal terminal Mode controls the switch circuit 30 to connect the output of the sub-control circuit 28 with the activating circuit 26 so as to force the motor 34 to rotate constantly. In other words, the sub-control circuit 28 records the phase difference when the CD drive 20 is in the constant linear velocity mode so as to drive the motor 34 when the CD drive 20 switches to the write mode.
Because the method according to the prior art controls the rotation speed of the motor 34 to adjust the harmony signal S0 so as to synchronize the harmony signal S0 with the frame clock Cf0, and the CD drive 20 must mechanically switch from the constant linear velocity mode to the write mode to drive the motor 34, a long response time is required for the CD drive 20 to write data onto the CD 10. Furthermore, other embedded circuitry of the CD drive 20 is necessary to control the timing to switch the CD drive 20 from the constant linear velocity mode to the write mode, that makes the circuit design of the CD drive 20 more complex.